1. Field of the Invention
The present Invention relates to a logarithmic amplifying circuit, and relates in particular to a logarithmic amplifying circuit suitable to be formed on a bipolar integrated circuit or a CMOS integrated circuit.
2. Description of the Related Art
Logarithmic amplifying circuits have been used in a variety of fields for outputting a logarithmic answer in response to an input signal. For realizing a logarithmic amplifying circuit, there are methods such as a first method which uses a logarithmic characteristic region included in a current-voltage characteristic curve for a PN junction, and a second method which provides a plurality of nonlinear amplifiers to combine output signals from each amplifier in order to obtain the approximate logarithmic characteristic of the output signals. According to the first method, it is possible to get logarithmic output signals with accuracy in the range from picoampere levels to several hundred microamperes. However, inasmuch as the frequency bandwidth for the output signals is narrow and depends on signals, it cannot be applied to, for example, an IF (intermediate frequency) stage of a radio receiver. In contrast, according to the second method, it is possible to expand the frequency band, the method being also applicable to the IF amplifier or the like. Further, as a third method for realizing a logarithmic amplifying circuit, there is for example the method disclosed in U.S. Pat. No. 4,794,342 and Japanese Patent Laid-open Gazettes No. 292010/87 (JP, A, 62-292010) and No. 165805/92 (JP, A, 4-165805) all by the present inventor. According to the method, a plurality of cascade-connected differential amplifiers and a plurality of rectifiers are provided for the full-wave square-law detection of a differential input of each stage and a differential output of the last stage, and then output signals of these rectifiers are summed up to obtain a synthetic logarithmic output.
FIG. 1 is a block diagram showing a basic structure of a logarithmic amplifying circuit according to the third method. In FIG. 1, there are m number of differential amplifiers 91.sub.1 to 91.sub.m cascade-connected in such a manner that a differential output signal from a former stage is inputted to a subsequent stage as a differential input signal. In FIG. 1, (m+1) number of rectifiers 92.sub.1 to 92.sub.m+1 are also provided and differential input signals to be inputted into differential amplifiers 91.sub.1 to 91.sub.m are also inputted to rectifiers 92.sub.1 to 92.sub.m respectively. Further, a differential output signal of the differential amplifier 91.sub.m of the last stage is inputted into the (m+1)-th rectifier 92.sub.m+1. Rectifiers 92.sub.1 to 92.sub.m+1 are structured such that each rectifier outputs, as a current signal, a full-wave rectified signal which is proportional to the square of the input voltage when the input voltage is within a range of the upper and lower limits of predetermined values. Each rectifier also outputs an electric current of a first predetermined value when the input voltage is over the upper limit and outputs an electric current of a second predetermined value when the input voltage is less than the lower limit. Further, an adder 93 is provided to add all output currents I.sub.RS1 to I.sub.RS(m+1) from respective rectifiers 92.sub.1 to 92.sub.m+1 for calculating the total sum. The output from the adder 93 becomes the output signal of the logarithmic amplifying circuit.
FIG. 2 shows, with reference to the logarithmic amplifying circuit of FIG. 1, the relation between the output currents I.sub.RS1 to I.sub.RS(m+1) from respective rectifiers 92.sub.1 to 92.sub.m+1 and an addition current I.sub.RSSI of the adder 93. The horizontal axis of FIG. 2 is expressed in a dB scale, i.e., in a logarithmic scale. In the diagram, a symbol G.sub.O represents an amplification factor (gain) of each of differential amplifiers 91.sub.1 to 91.sub.m+1. As shown in the diagram, the synthetic amplification factor is given as (m+1)G.sub.O, proving that logarithmic amplification has been achieved. Inasmuch as the logarithmic amplifying circuit implements logarithmic approximation by means of a number of rectifiers, the propriety of the logarithmic characteristic or the propriety of the approximation to the logarithmic characteristic is determined depending on the circuits or the rectifying characteristics of each full-wave rectifier. It is to be noted that the synthetic amplification factor can be adjusted by changing the amplification factor of each of differential amplifiers 91.sub.1 to 91.sub.m+1.
As a rectifier to be used in the logarithmic amplifying circuit of this kind having a full-wave square rectification characteristic, as shown in the above Laid-open documents, there is a rectifier familiar that is well known to the public in which input signals supplied to two pairs of unbalanced differential pairs composed of bipolar transistors or MOS transistors are cross-coupled and output signals therefrom are parallel-connected. The unbalanced differential pair can be prepared, if necessary, by using bipolar transistors each having an emitter of a different area or by using MOS transistors each having a different ratio of channel width W to channel length L, that is, a different value of W/L. The relation between the ratios of emitter areas or (W/L)s and the full-wave rectification characteristics of transistors composing the unbalanced differential pair is disclosed in detail in the literature by the present inventor, "K. Kimura, IEEE Transactions on Circuits and Systems-I, Vol. 39, No. 9, pp. 771-777, September 1992". By referring to the literature, it becomes possible to constitute a proper half- and full-wave rectifiers.
However, in two pairs of unbalanced differential pairs of the conventional logarithmic amplifying circuit, since collectors of a larger size or drains of a larger size are coupled with each other, the resulting capacity becomes large and the drive current tends to be increased for expanding the frequency characteristic to the high frequency area.
In the U.S. Pat. No. 4,990,803 by B. Gilbert, there is disclosed a logarithmic amplifying circuit in which a full-wave rectifier is structured with two pairs of bipolar differential pairs parallelly connected, and this full-wave rectifier is disposed in each stage of cascade-connected differential amplifiers. In the full-wave rectifier of the circuit by B. Gilbert, a DC offset voltage with a different sign is superimposed on the base of each transistor which constitutes the differential pair, and a logarithmic dynamic range per full-wave rectifier is about 10 dB. Therefore, in order to provide a logarithmic amplifying circuit, it is necessary to cascade-connect differential amplifiers each having a gain of about 10 dB. Consequently, a number of differential amplifiers are required to obtain a logarithmic dynamic range of a desired level resulting in the increase of the dissipation current.
Thus, the conventional logarithmic amplifying circuit described above has a structure which is disadvantageous for realizing a low dissipation current.